1. Field of the Invention
This invention relates to computing systems, and more particularly, to efficiently managing multiple PLLs on a system on a chip (SOC).
2. Description of the Relevant Art
A system-on-a-chip (SOC) integrates multiple functions into a single integrated chip substrate. The functions may include digital, analog, mixed-signal and radio-frequency (RF) functions. Typical applications are used in the area of embedded systems. Energy-constrained cellular phones, portable communication devices and entertainment audio/video (A/V) devices are some examples of systems using an SOC. An SOC may use powerful processors that execute operating system (OS) software. In addition, the SOC may be connected to both external memory chips, such as Flash or RAM, and various external peripherals.
The power consumption of integrated circuits (ICs), such as modern complementary metal oxide semiconductor (CMOS) chips, is proportional to at least the expression fV2. The symbol f is the operational frequency of the chip. The symbol V is the operational voltage of the chip. In modern microprocessors, both parameters f and V may be varied during operation of the IC. For example, during operation, modern processors allow users to select one or more intermediate power-performance states between a maximum performance state and a minimum power state.
During the execution of applications on embedded systems, a powerful processor may not be the leading energy-consumer when high-performance memories, color displays, and other functions are being used. An overriding power management goal in portable systems is to reduce system-wide energy consumption. A dynamic power management system on an SOC may support multiple power management policies that allow device manufacturers to specialize policies for their applications and differentiate their products based on their own unique approaches to power management. In addition, as integration increases on a SOC, so do a number of different active clocks and a number of phase lock loops (PLLs) to support the clocks.
Embedded systems may not have a basic-input-output-software (BIOS) or machine abstraction layer to insulate the OS from low-level device and power management. Therefore, the kernel in the OS may handle these tasks. As integration on an SOC increases, the interrelationships between clock sources and power management modes become more complex. Further, other tasks become increasingly difficult, such as switching core clocks between sources (PLLs) of clocks effectively, managing the stopping, starting and relocking of the PLLs, and reconfiguring the PLLs. These increasingly difficult tasks may become burdensome on the software leading to less flexibility on the management of the PLLs.
In view of the above, efficient methods and mechanisms for efficiently managing multiple PLLs on a system on a chip (SOC) are desired.